[ 연사 소개 ]
Dynamic, result-oriented professional with over 30 years of experience in Cloud/AI/ML Sever Silicon Architecture. Design & validation, specializing in DRAM,
and non-volatile memory & cache-coherency interconnectivity, Ethernet and other networking, product requirement planning and specifications.
Currently Chief Technologist & AVP in Mediatek driving Custom HBM, Datacenter LPDDR, Optical (CPO) interconnect strategy for Nx reticle designs
(Where N is a very large number 😀) for AI accelerator products for training and inference workloads.
Was from 1998 to 2024 a Sr. Technologist & Sr. Principal Engineer & Lead-Architect of the NextGen Memory, DDR5 DRAM,
HBM (high-bandwidth memory,signal integrity and specifications) and also QuickPath Interconnect (QPI/KTI/UPI) and Scalable Memory Interconnect (SMI),
which are the cornerstones of Intel Xeon technology.
Key member of the Intel Server Architecture team for last 15 years.
Led Architecture, design and implementation teams in successfully delivering the, Alpha-21364 (EV7), as part of Digital/Compaq/HP.
Solid ability to identify and solve strategic, technical and operational issues in established or new hi-tech ventures.
Creative thinker, leader and a resourceful team player with a keen sense of innovation and entrepreneurship.
Accomplished presenter and excellent communicator.
Strong engineering professional with a Bachelor of Technology (B.Tech.) focused in Electrical and Electronics Engineering from Indian Institute of Technology.
Arvind used to love playing golf, till he injured his shoulder and now is enjoying golf vicariously by caddying for his son.
Arvind Kumar는 클라우드, AI/ML 서버용 반도체 아키텍처 분야에서 30년 이상의 경력을 보유한 전문가입니다.
DRAM, 비휘발성 메모리, 캐시 일관성(Cache Coherency) 인터커넥트, Ethernet 및 기타 네트워킹 기술, 제품 요구사항 기획 및 규격 개발을 전문으로 하고 있습니다.
현재 MediaTek의 Chief Technologist 겸 AVP(Assistant Vice President)로 재직하며, AI 학습 및 추론용 AI 가속기 제품을 위한 맞춤형 HBM, 데이터센터용 LPDDR,
광 인터커넥트(CPO) 및 대규모 멀티 레티클(Nx Reticle) 설계를 위한 인터커넥트 전략을 총괄하고 있습니다.
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